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1

[IEEE 2019 International 3D Systems Integration Conference (3DIC) - Sendai, Japan (2019.10.8-2019.10.10)] 2019 International 3D Systems Integration Conference (3DIC) - High Bandwidth Memory (HBM) and High Bandwidth NAND (HBN) with the Bumpless TSV Technology

Sakui, Koji, Ohba, Takayuki

Année:

2019

Fichier:

PDF, 9.60 MB

2019

2

[IEEE 2019 IEEE Custom Integrated Circuits Conference (CICC) - Austin, TX, USA (2019.4.14-2019.4.17)] 2019 IEEE Custom Integrated Circuits Conference (CICC) - Three-dimensional Integration (3DI) with Bumpless Interconnects for Tera-scale Generation : High Speed, Low Power, and Ultra-small Operating Platform

Sakui, Koji, Ohba, Takayuki

Année:

2019

Langue:

english

Fichier:

PDF, 1.22 MB

english, 2019

3

Vertically Replaceable Memory Block Architecture for Stacked DRAM Systems by Wafer-on-Wafer (WOW) Technology

Sugatani, Shinji, Chujo, Norio, Sakui, Koji, Ryoson, Hiroyuki, Nakamura, Tomoji, Ohba, Takayuki

Journal:

IEEE Transactions on Electron Devices

Année:

2020

Fichier:

PDF, 1.45 MB

2020

4

A high efficient, low power, and compact charge pump by vertical MOSFETs

Koji Sakui, Tetsuo Endoh

Journal:

Solid-State Electronics

Année:

2010

Langue:

english

Fichier:

PDF, 923 KB

english, 2010

5

A new vertical MOSFET “Vertical Logic Circuit (VLC) MOSFET” suppressing asymmetric characteristics and realizing an ultra compact and robust logic circuit

Koji Sakui, Tetsuo Endoh

Journal:

Solid-State Electronics

Année:

2010

Langue:

english

Fichier:

PDF, 1.14 MB

english, 2010

6

[IEEE 2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010 - Paris, France (2010.05.30-2010.06.2)] Proceedings of 2010 IEEE International Symposium on Circuits and Systems - A compact and low power logic design for multi-pillar vertical MOSFETs

Sakui, Koji, Endoh, Tetsuo

Année:

2010

Langue:

english

Fichier:

PDF, 1.16 MB

english, 2010

7

An Advanced NAND-Structure Cell Technology for Reliable 3.3 V 64 Mb Electrically Erasable and Programmable Read Only Memories (EEPROMs)

Aritome, Seiichi, Hatakeyama, Ikuo, Endoh, Tetsuo, Yamaguchi, Tetsuya, Shuto, Susumu, Iizuka, Hirohisa, Maruyama, Tooru, Watanabe, Hiroshi, Hemink, Gertjan, Sakui, Koji, Tanaka, Tomoharu, Momodomi, Ma

Journal:

Japanese Journal of Applied Physics

Année:

1994

Langue:

english

Fichier:

PDF, 1.86 MB

english, 1994

8

Sub-10nm Multi-Nano-Pillar Type Vertical MOSFET

ENDOH, Tetsuo, SAKUI, Koji, YASUDA, Yukio

Journal:

IEICE Transactions on Electronics

Année:

2010

Langue:

english

Fichier:

PDF, 7.79 MB

english, 2010

9

[Widerkehr & Associates 1996 Symposium on VLSI Circuits. Digest of Technical Papers - Honolulu, HI, USA (13-15 June 1996)] 1996 Symposium on VLSI Circuits. Digest of Technical Papers - A 120 mm/sup 2/ 64 Mb NAND flash memory achieving 180 ns/byte effective program speed

Jin-Ki Kim,, Koji Sakui,, Sung-Soo Lee,, Itoh, J., Suk-Chon Kwon,, Kanazawa, K., Ji-Jun Lee,, Nakamura, H., Kang-Young Kim,, Himeno, T., Jang-Rae Kim,, Kanda, K., Tae-Sung Jung,, Oshima, Y., K

Année:

1996

Langue:

english

Fichier:

PDF, 309 KB

english, 1996

10

[IEEE 2010 IEEE International Memory Workshop - Seoul, Korea (South) (2010.05.16-2010.05.19)] 2010 IEEE International Memory Workshop - Design impacts on NAND Flash memory core circuits with vertical MOSFETs

Sakui, Koji, Endoh, Tetsuo

Année:

2010

Langue:

english

Fichier:

PDF, 792 KB

english, 2010

11

[IEEE Proceedings of 2010 International Symposium on VLSI Technology, System and Application - Hsin Chu, Taiwan (2010.04.26-2010.04.28)] Proceedings of 2010 International Symposium on VLSI Technology, System and Application - A compact, high-speed, and low-power design for multi-pillar vertical MOSFET's, suppressing characteristic influences by process fluctuation

Sakui, Koji, Endoh, Tetsuo

Année:

2010

Langue:

english

Fichier:

PDF, 907 KB

english, 2010

12

Professor Fujio Masuoka?s Passion and Patience Toward Flash Memory

Journal:

IEEE Solid-State Circuits Magazine

Année:

2013

Langue:

english

Fichier:

PDF, 1.17 MB

english, 2013

13

[IEEE 2010 International Conference on Microelectronic Test Structures (ICMTS) - Hiroshima, Japan (2010.03.22-2010.03.25)] 2010 International Conference on Microelectronic Test Structures (ICMTS) - A unique and accurate extraction technique of the asymmetric bottom-pillar resistance for the vertical MOSFET

Sakui, Koji, Endoh, Tetsuo

Année:

2010

Langue:

english

Fichier:

PDF, 2.12 MB

english, 2010

14

Mechanical ventilatory assistance may reduce dyspnea during walking especially in patients with impaired cardiopulmonary function early after cardiovascular surgery

Kamisaka, Kenta, Sakui, Daisuke, Hagiwara, Yuta, Kamiya, Kuniyasu, Adachi, Takuji, Iida, Jun, Morishima, Manabu, Ueyama, Koji, Yamada, Sumio

Journal:

Journal of Cardiology

Année:

2016

Langue:

english

Fichier:

PDF, 1.34 MB

english, 2016

15

10.2320/materia.41.90

Journal:

Année:

2002

Fichier:

PDF, 1.16 MB

2002

16

[IEEE 2019 IEEE 11th International Memory Workshop (IMW) - Monterey, CA, USA (2019.5.12-2019.5.15)] 2019 IEEE 11th International Memory Workshop (IMW) - High Speed, Low Power, and Ultra-Small Operating Platform with Three-Dimensional Integration (3DI) by Bumpless Interconnects

Sakui, Koji, Ohba, Takayuki

Année:

2019

Langue:

english

Fichier:

PDF, 1.25 MB

english, 2019